Circuit optimization via sequential computer experiments: design of an output buffer |
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Authors: | Robert Aslett Robert J Buck Steven G Duvall Jerome Sacks & William J Welch |
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Institution: | Intel Corporation, Hillsboro, USA,;Western Michigan University, Kalamazoo, USA,;Intel Corporation, Santa Clara, USA,;National Institute of Statistical Sciences, Research Triangle Park, USA,;University of Waterloo, Canada |
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Abstract: | In electrical engineering, circuit designs are now often optimized via circuit simulation computer models. Typically, many response variables characterize the circuit's performance. Each response is a function of many input variables, including factors that can be set in the engineering design and noise factors representing manufacturing conditions. We describe a modelling approach which is appropriate for the simulator's deterministic input–output relationships. Non-linearities and interactions are identified without explicit assumptions about the functional form. These models lead to predictors to guide the reduction of the ranges of the designable factors in a sequence of experiments. Ultimately, the predictors are used to optimize the engineering design. We also show how a visualization of the fitted relationships facilitates an understanding of the engineering trade-offs between responses. The example used to demonstrate these methods, the design of a buffer circuit, has multiple targets for the responses, representing different trade-offs between the key performance measures. |
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Keywords: | Circuit simulator Computer code Computer model Engineering design Parameter design Stochastic process Visualization |
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