| SoC软硬件协同技术的FPGA芯片测试新方法 |
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| 引用本文： | 李平,廖永波,阮爱武,李威,李文昌. SoC软硬件协同技术的FPGA芯片测试新方法[J]. 电子科技大学学报(社会科学版), 2009, 0(5) |
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| 作者姓名： | 李平 廖永波 阮爱武 李威 李文昌 |
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| 作者单位： | 电子科技大学电子薄膜与集成器件国家重点实验室; |
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| 摘 要： | 针对传统的基于纯硬件平台的FPGA芯片测试方法所存在的种种问题,提出并验证了一种基于软硬件协同技术的FPGA芯片测试方法。该方法引入了软件的灵活性与可观测性等软件技术优势,具有存储深度大、可测I/O管脚数目多、自动完成配置下载(不需人工干预)和自动定位FPGA中的错误等优点,提高了FPGA的测试速度和可靠性,并降低了测试成本,与传统的自动测试仪(ATE)相比有较高的性价比。采用软硬件协同方式针对Xilinx4010的I/O单元进行了测试,实现了对FPGA芯片的自动反复配置、测试和错误定位。
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| 关 键 词： | 配置 可编辑门阵列 软硬件协同 片上系统 测试 |
Novel Approach to Test Field Programmable Gate Array Based on SoC HW/SW Co-Verification Technology |
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| LI Ping,LIAO Yong-bo,RUAN Ai-wu,LI Wei,, LI Wen-chang. Novel Approach to Test Field Programmable Gate Array Based on SoC HW/SW Co-Verification Technology[J]. Journal of University of Electronic Science and Technology of China(Social Sciences Edition), 2009, 0(5) |
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| Authors: | LI Ping LIAO Yong-bo RUAN Ai-wu LI Wei LI Wen-chang |
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| Affiliation: | LI Ping,LIAO Yong-bo,RUAN Ai-wu,LI Wei,, LI Wen-chang (State Key Laboratory of Electronic Thin Films , Integrated Devices,University of Electronic Science , Technology of China Chengdu 610054) |
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| Abstract: | Traditional field programmable gate array(FPGA) test schemes confront many problems,such as memory depth not large enough to meet requirement of configuration of many times,I/O pin counts usually less than needed,manual configuration generation and download,no position of fault sites,etc.A new approach to test FPGA based on SoC HW/SW co-verification technology is proposed and verified in the paper.This test scheme has taken advantage of flexibility and observability of software in conjunction with high-spee... |
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| Keywords: | configuration FPGA HW/SW co-verification system on chip test |
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