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MIMO实验系统中的数据缓冲应用研究
引用本文:杨芳,何子述.MIMO实验系统中的数据缓冲应用研究[J].电子科技大学学报(社会科学版),2005(5).
作者姓名:杨芳  何子述
作者单位:电子科技大学电子工程学院 成都610054 (杨芳),电子科技大学电子工程学院 成都610054(何子述)
基金项目:国家863计划资助项目(2002AA123032)
摘    要:研究了基于FPGA控制的SDRAMModule在移动通信的MIMO技术实验系统中的应用,主要介绍了MIMO实验系统硬件平台、SDRAM的特点及其控制器软核的VHDL设计,以及USB2.0方式的数据传输。通过对页面读写、突发读写、集总和定时刷新等工作方式的灵活运用,很好地解决了MIMO无线通信中的海量数据高速缓冲问题。经MIMO实验系统验证表明,SDRAM控制器的数据缓冲方案高效可行,适用性突出。

关 键 词:MIMO实验系统  缓冲  同步动态随机存储器  通用串行总线

Research on the Application Solution for Data Buffer in MIMO Experimental Systems
YANG Fang,HE Zi-shu.Research on the Application Solution for Data Buffer in MIMO Experimental Systems[J].Journal of University of Electronic Science and Technology of China(Social Sciences Edition),2005(5).
Authors:YANG Fang  HE Zi-shu
Abstract:The wireless communication system is up against various engineering challenges. For both the transmitted and the received data processing, fast-access memories with large capacity are required in experimentation systems with Multiple-Input & Multiple-Output technique. SDRAM is a kind of random access memory with large-capacity and high-speed, but many Microprogrammed Control Units or normal Digital Signal Processors cannot directly interface with SDRAM due to the differences between control signals. Based on FPGA(field programmable gate array), a design method of SDRAM controller with USB interface to computer is proposed . Large-capacity data access is implemented at high speed by the controller circuit, which is working effectively in our MIMO experimentation system.
Keywords:MIMO experimentation system  buffer  synchronous DRAM  universal serial bus
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