Modeling U.S.-Japan competition in semiconductors

This paper describes an analytical framework used to analyze Japanese-American competition in the market for computer memory devices. The nature of this competition has captured the attention of policy makers in both countries, as evidenced by recent trade disputes alleging Japanese firms have benefited from unfair government subsidies, lax antitrust policies, and restrictive home market practices. In this paper, we present a methodology that may be used to estimate the impact of some of these programs on the competitive structure of the United States market for dynamic random access memory devices (DRAMs). The model incorporates the nature of the DRAM manufacturing process (in which “learning curve” benefits are tremendously important), and portrays the worldwide DRAM market as one in which (1) geographic market segmentation is prevelant, (2) a limited number of suppliers compete, and (3) the products are imperfect substitutes. This situation matches well the situation found in the Semiconductor DRAM Market. The distinctive features of this approach are the detailed modeling of the impact of learning on the cost structure of the firm, and its framework for analyzing firm behavior in an imperfect market. Using this approach, we evaluate how a variety of Japanese government programs have affected the competitive position of their industry, and present our view on the major policy implications which emerge.