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Capacitated qualification management in semiconductor manufacturing
Affiliation:1. École des Mines de Saint-Étienne, Department of Manufacturing Sciences and Logistics, CMP, Site Georges Charpak, CNRS UMR 6158 LIMOS, 880 avenue de Mimet, 13541 Gardanne, France;2. Soitec, Parc Technologique des Fontaines, 38190 Bernin, France;1. UTFSM, Valparaíso, Chile;2. INRIA Rennes Bretagne-Atlantique, Rennes, France;1. Division of Gastroenterology and Hepatology, New York Presbyterian Hospital and Weill Cornell Medical Center, New York, New York, USA;2. Division of Endocrine Surgery, New York Presbyterian Hospital and Weill Cornell Medical Center, New York, New York, USA;3. Division of Gastroenterology and Hepatology, New York Presbyterian Hospital and Weill Cornell Medical Center, New York, New York, USA;1. Institute of Applied Mathematics, Department of Logistics, Wroclaw University of Economics, ul. Komandorska 118/120, 53-345 Wroclaw, Poland;2. Business Economics Group, Wageningen University, Hollandseweg 1, 6706 KN Wageningen, Netherlands;3. Food and Resource Economics Department, University of Florida, McCarty Hall A (MCCA), P.O. Box 110240, Gainesville, FL 32611-0240, USA;1. CNRS, Control Systems Department, University of Grenoble, 11, rue des Mathématiques, Domaine Universitaire, 38400 Saint Martin d’Hères, France;2. Schneider Electric, Technology Innovation, Technopole, 37-quai Paul Merlin, 38050 Grenoble cedex, France;1. School of Economics and Management, Nanjing University of Science and Technology, Nanjing 210094, People׳s Republic of China;2. Department of Logistics and Maritime Studies, The Hong Kong Polytechnic University, Hung Hom, Kowloon, Hong Kong
Abstract:In semiconductor manufacturing, machines are usually qualified to process a limited number of recipes related to products. It is possible to qualify recipes on machines to better balance the workload on machines in a given toolset. However, all machines of a toolset do not have equal uptimes and may further suffer from scheduled and unscheduled downtimes. This may heavily impact an efficient recipe-to-machine qualification configuration. In this paper, we propose indicators for recipe-to-machine qualification management based on the overall toolset workload balance under capacity constraints. The models, deployed in industry, demonstrate that the toolset capacity must be considered while managing qualifications. Industrial experiments show how capacity consideration leads to an optimal qualification configuration and therefore capacity utilization.
Keywords:Semiconductor manufacturing  Qualification management  Capacity planning  Capacitated workload balancing
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