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一种锁相环调频信号解调集成电路的设计
引用本文:李智,卢国建,王兆明.一种锁相环调频信号解调集成电路的设计[J].电子科技大学学报(社会科学版),1995(Z2).
作者姓名:李智  卢国建  王兆明
作者单位:电子科技大学电子工程系
基金项目:国家“八五”科技攻关集成电路产品开发资助项目
摘    要:介绍了一种调频信号解调实用集成电路芯片UE701的设计与开发。此芯片为正向设计的模拟集成电路,采用锁相环对调频信号实现解调,因而信噪比高,且易于集成。在国内现有工艺条件下,做出了满足低电压、低功耗和抗干扰能力强的产品。该产品可广泛用作各种电子系统的调频信号处理部件。

关 键 词:模拟集成电路  锁相环  调频  解调  差分放大

The Design of a Frequency-Modulation Signal Demodulation Integrated Circuit with Phase Locked Loop
Li Zhi, Lu Guojian, Wang Zhoming.The Design of a Frequency-Modulation Signal Demodulation Integrated Circuit with Phase Locked Loop[J].Journal of University of Electronic Science and Technology of China(Social Sciences Edition),1995(Z2).
Authors:Li Zhi  Lu Guojian  Wang Zhoming
Abstract:In this paper, the design and the development of a frequency-modulation signal demodultion integrated circuit chip UE701 are presented. This chip is an analog integrated circuit by forward design. Thephase locked loop is used for demodulation of freqnency-modulated signai,therefore the signal to noise ratiois high and the integrated is easy. Under the internal technology condition,the product which can satisfy therequirements of low voltage,fow dissipation and strong anti-interference is produced. The Product can beapplied extensively as a part of frequency-modutation signal process in various electronic systems.
Keywords:analog integrated circuit  phase locked loop  frequency-modulation  demodulation  differential amplification  
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