| 电流模式神经网络分类器的CMOS实现技术 |
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| 引用本文： | 孟相如,虞厥邦.电流模式神经网络分类器的CMOS实现技术[J].电子科技大学学报(社会科学版),1997(5). |
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| 作者姓名： | 孟相如 虞厥邦 |
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| 作者单位： | 电子科技大学光电子技术系 |
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| 基金项目： | 国家教委博士后科学基金 |
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| 摘 要： | 运用电流模式技术，以Ｈａｍｍｉｎｇ神经网络为基本模型，进行了二值模式的最优的最小误差分类器设计实现。给出了全电流模式胜者为王（ＷＴＡ）子网和模式间匹配值计算子网的ＣＭＯＳ实现电路，计算机仿真与理论结果相吻合。该分类器很好地模拟了生物神经网络中的侧抑制作用，所得电路结构简单，适合用标准ＶＬＳＩ工艺集成，有其应用价值。
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| 关 键 词： | 神经网络 电流模式 电路设计 模式识别 集成电路 |
CMOS Implementation Technique of Current mode Neural Network Classifier |
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| Meng Xiangru,Yu Juebang.CMOS Implementation Technique of Current mode Neural Network Classifier[J].Journal of University of Electronic Science and Technology of China(Social Sciences Edition),1997(5). |
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| Authors: | Meng Xiangru Yu Juebang |
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| Abstract: | The implementation of an optimum minimum error classifier based on the Hamming neural model is discussed for binary patterns in this paper by the use of current mode technique.The CMOS implementation of current mode winner take all(WTA) circuit and the subnet for calculating matching scores between two patterns are demonstrated.Computer simulations are in agreement with the theory.The classifier mimics well the heavy use of lateral inhibition evident in the biological neural nets.The resulting circuits are simple and particularly suitable for integration with standard VLSI technology,thus will have perspecitve in many application areas. |
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| Keywords: | neural networks current mode circuit design pattern recognition intergated circuits |
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